The present invention relates to an active matrix display screen permitting the display of gray levels.
An active matrix display screen is diagrammatically shown in FIG. 1 and comprises a first wall 10 on which are deposited a matrix of N by P electrodes 12 forming first capacitor plates or coating, N addressing rows 14 and P addressing column 16, NP control transistors 18 each having a drain, a gate and a source, the drain of each transistor being connected to the plate 12 of one of the capacitors, the source to one of the columns 16 and the gate to one of the rows 14; a second wall 20 on which is deposited a counterelectrode 22 forming the second plate or coating of the capacitors; a first row control circuit 30 able to successively apply to the N rows 14 a voltage V.sub.L able to make the transistors of each row conductive for a time T.sub.L, the control of the N rows constituting a frame of duration Tr=NT.sub.L ; a second control circuit 32 able to apply to the counterelectrode 22 a voltage Vce successively assuming two values, a value 0 and a value Vc, the voltage Vce passing from one to the other of these values, either after each frame, or after each row; and a third column control circuit 34 able to apply a set of P voltages to the columns 16 throughout the control time of a row.
FIG. 2 shows a detail of a display point. It is possible to see an addressing row Li, An addressing column Cj, a transistor Tij having a gate G, a source S and a drain D and finally a conductor block Cij. Source S is connected to column Cj, a gate G to row Li and drain D to block Cij.
For controlling a display point corresponding to plate Cij, transistor Tij is opened for a time T.sub.L. A potential difference between column Cj linked with source S of Tij and counterelectrode 22 brings about a charge flow into the transistor channel. These charges are stored on drain D, i.e. finally on plate Cij and, symmetrically, on the counterelectrode. Following the row addressing time, transistor Tij is made non-conductive. The charge Qij stored in the capacitor remains there and a voltage Vij is permanently applied to the display material, i.e. to the liquid crystal. This voltage is equal to Qij/Kij, if Kij designates the capacitance of the display point.
If it is wished to display a gray level, it is necessary to give this ratio a value between 0 and a value Vmax corresponding to a saturated state (white).
Two solutions are known in the prior art for displaying such gray levels. The first is illustrated in FIG. 3. In the latter and in the following drawings, the time is broken up into row addressing intervals of duration T.sub.L and, for simplification purposes, it is assumed that the screen contains 5 rows L.sub.1, L.sub.2. . . L.sub.5. The scan of these 5 rows constitutes a first frame and the scan of the 5 following rows a second frame.
Part a of FIG. 3 shows the voltage Vcj applied to a random volume of rank j. This voltage is shown in broken line form. It is also possible to see the voltage VCe applied to the counterelectrode (in continuous line form). The latter is 0 for the first frame and then equal to Vmax during the second. The voltage applied to a column varies between 0 and Vmax, in accordance with a voltage scale. The resulting voltage applied to the display point located on column j is equal to the difference VCj-VCe, which corresponds to the hatched area. It can be seen that said voltage has a mean value 0, because of the alternation at each frame (to prevent charge accumulation phenomena which might damage the liquid crystal).
With respect to the voltage Vij appearing on a given display point, e.g., on the second row and the jth column, it varies as shown in part b. During the interval when the second line is addressed, the voltage increases up to a value Vgr and then when the line is no longer addressed, the voltage remains at this value.
The advantage of this method is that by using relatively conductive transistors, at the end of the row addressing time, voltage Vij reaches level Vgr corresponding to the gray to be displayed and this voltage is not dependent on the value of the transistor drain current. The gray levels will then be reproduced on the screen with the same brightness level for all points.
However, the disadvantage of this method is that it makes it necessary to produce a large number of voltages Vgr (the same number as gray levels are desired), which makes the control circuit very complex.
There is another gray display control method, which is illustrated in FIG. 4. In part a, it is possible to see in continuous line form, the voltage Vce applied to the counterelectrode and in broken line form the voltage VCj applied to a column of rank j during the various row control intervals. It can be seen that the display time of a point is subdivided into two intervals and during the first, of duration t.sub.1, the column is brought to the same potential as the counter electrode, whereas during the second it is brought to a voltage Vmax. Moreover, use is made of limited conduction transistors, so that the voltage Vij (shown in part b) does not reach the maximum value Vmax, if interval t.sub.2 is below the total addressing interval of a row T.sub.L.
The advantage of the second solution compared with the first, is that it only requires two voltage levels for the control of the rows, namely 0 and Vmax. Its disadvantage is that the voltage finally reached is dependent on the drain current of the controlled transistor. However, this current is in fact difficult to control for technological reasons, so that the reproduction on a screen of the same brightness at several points and for a same gray level is difficult to obtain.